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LX5261 Fiches technique(PDF) 2 Page - Microsemi Corporation |
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LX5261 Fiches technique(HTML) 2 Page - Microsemi Corporation |
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2 / 6 page ![]() Microsemi Integrated Products Division 11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570 Page 2 Copyright © 2000 Rev. 1.0c, 2005-02-08 LX5261 27-Line LVD SCSI Source/Sink Regulator PRODUCTION DATASHEET TM ® ABSOLUTE MAXI MUM RATI NGS Term Power (VTERM) .........................................................................................................6V Operating Junction Temperature..................................................................................... 150°C Storage Temperature Range..............................................................................-65°C to 150°C RoHS / Pb-freePeak Package Solder Reflow Temperature (40 second maximum exposure) ........................................................................ 260°C (+0, -5) Note: Exceeding these ratings could cause damage to the device. All voltages are with respect to Ground. Currents are positive into, negative out of specified terminal. TH ERM A L DATA DP 16-Pin SOIC THERMAL RESISTANCE-JUNCTION TO AMBIENT, θJA 111.8 °C/W Junction Temperature Calculation: TJ = TA + (PD x θJA). The θJA numbers are guidelines for the thermal performance of the device/pc-board system. All of the above assume no ambient airflow. θJA can vary significantly depending on mounting technique. (See Application Notes Section: Thermal considerations) PACKAGE PIN OUT 2 3 5 4 15 14 11 12 6 7 10 8 N/C 9 116 N/C N/C N/C N/C N/C N/C N/C VOUT1 VOUT2 VTERM HSGND HSGND HSGND GND DIFSENS 13 DP PACKAGE (Top View) NC – No Internal Connection RoHS / Pb-free 100% Matte Tin Lead Finish FUNCTIONAL PIN DESCRIPTION PIN NAME DESCRIPTION VOUT1 1.75V Regulated Output. Capable of sourcing/sinking 200mA. VOUT2 0.75V Regulated Output. Capable of sourcing/sinking 200mA. VTERM Power supply pin for terminator. Connect to SCSI bus VTERM. Usually decoupled by one 4.7µF low-ESR capacitor. It is absolutely necessary to connect this pin to the decoupling capacitor through a very low impedance (big traces to PCB). Keeping distances very short from the decoupling capacitors is somewhat layout dependent and some applications may benefit from high frequency decoupling with 0.1µF capacitors at VTERM pin. DIFSENS 1.3V buffered output for DIFSENS signaling. GND Regulator ground pin. Connect to ground. HSGND Attached to die mounting pad, but not bonded to GND pin. Pins should be considered a heat sink only, and not a true ground connection. It is recommended that these pins be connected to ground, but can be left floating. |
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