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APT6010JFLL Fiches technique(PDF) 5 Page - Microsemi Corporation |
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APT6010JFLL Fiches technique(HTML) 5 Page - Microsemi Corporation |
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5 / 5 page ![]() Figure 18, Turn-on Switching Waveforms and Definitions Figure 19, Turn-off Switching Waveforms and Definitions Drain Current DrainVoltage GateVoltage Switching Energy 10% t d(on) 90% 5% t r 5% 10% Switching Energy Drain Current DrainVoltage GateVoltage 10% 0 t d(off) 90% t f 90% ID D.U.T. VDS Figure 20, Inductive Switching Test Circuit VDD G APT30DF60 T J125°C T J125°C SOT-227 (ISOTOP®) Package Outline 31.5 (1.240) 31.7 (1.248) Dimensions in Millimeters and (Inches) 7.8 (.307) 8.2 (.322) 30.1 (1.185) 30.3 (1.193) 38.0 (1.496) 38.2 (1.504) 14.9 (.587) 15.1 (.594) 11.8 (.463) 12.2 (.480) 8.9 (.350) 9.6 (.378) Hex Nut M4 (4 places) 0.75 (.030) 0.85 (.033) 12.6 (.496) 12.8 (.504) 25.2 (0.992) 25.4 (1.000) 1.95 (.077) 2.14 (.084) * Source Drain Gate * r = 4.0 (.157) (2 places) 4.0 (.157) 4.2 (.165) (2 places) W=4.1 (.161) W=4.3 (.169) H=4.8 (.187) H=4.9 (.193) (4 places) 3.3 (.129) 3.6 (.143) * Source Source terminals are shorted internally. Current handling capability is equal for either Source terminal. APT6010JFLL Microsemi’s products are covered by one or more of U.S.patents 4,895,810 5,045,903 5,089,434 5,182,234 5,019,522 5,262,336 6,503,786 5,256,583 4,748,103 5,283,202 5,231,474 5,434,095 5,528,058 and foreign patents. US and Foreign patents pending. All Rights Reserved. ISOTOP®is a registered trademark of ST Microelectronics NV. |
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