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TDA10021 Fiches technique(PDF) 8 Page - NXP Semiconductors

No de pièce TDA10021
Description  DVB-C channel receiver
PDF  16 Pages
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Fabricant  PHILIPS [NXP Semiconductors]
Site Internet  http://www.nxp.com
Logo PHILIPS - NXP Semiconductors

TDA10021 Fiches technique(HTML) 8 Page - NXP Semiconductors

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2001 Oct 01
8
Philips Semiconductors
Product specification
DVB-C channel receiver
TDA10021HT
CHARACTERISTICS
Notes
1. The voltage level of the 5 V supply must always exceed or at least equal the voltage level of the 3.3 V supply during
power-up and power-down in order to guarantee protection against latch-up.
2. All digital inputs are 5 V tolerant except pin XIN.
3. IOH,IOL = ±4 mA for pins SACLK, SCL, SDA, SDAT, SCLT, TCK, TDI, TRST, TMS, TDO, GPIO, UNCOR, PSYNC,
OCLK, DEN and DO[7:0]. For all other pins, IOH, IOL = ±2 mA.
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
VDDD33
digital supply voltage for the
pads
VDDD = 3.3 V ±10%
2.97
3.3
3.63
V
VDDD18
digital supply voltage for the
core
VDDD = 1.8 V ±5%
1.7
1.8
1.9
V
VDDD50
digital supply voltage
only for 5 V
requirements; note 1
4.75
5.0
5.25
V
VIH
HIGH-level input voltage
TTL input; note 2
2
−
VDDD50
V
VIL
LOW-level input voltage
TTL input
0
−
0.8
V
VOH
HIGH-level output voltage
note 3
2.4
−−
V
VOL
LOW-level output voltage
−−
0.4
V
IDDD33
digital supply current for the
pads
fs = 28.92 MHz;
symbol rate = 7 Mbaud
−
46
−
mA
IDDD18
digital supply current for the
core
fs = 28.92 MHz;
symbol rate = 7 Mbaud
−
120
−
mA
Ptot
total power dissipation
fs = 28.92 MHz;
symbol rate = 7 Mbaud
−
540
−
mW
Ci
input capacitance
−−
5pF
Tamb
ambient temperature
0
−
70
°C
XTAL; pin XIN
VIH
HIGH-level input voltage
0.7VDDD33
−
VDDD33
V
VIL
LOW-level input voltage
0
−
0.3VDDD33
V
PLL
VDDD(PLL)
digital PLL supply voltage
VDDD = 1.8 V ±5%
1.7
1.8
1.9
V
VDDA(PLL)
analog PLL supply voltage
VDDA = 3.3 V ±10%
2.97
3.3
3.63
V
ADC
VDDA1
analog ADC supply voltage
VDDA = 1.8 V ±5%
1.7
1.8
1.9
V
VDDA2,VDDA3
analog ADC supply voltage
VDDA = 3.3 V ±10%
2.97
3.3
3.63
V
VIP,VIM
analog ADC inputs
−0.5
−
VDDA3 + 0.5
V
Vi
signal input range
IR =VIP − VIM
−0.5 to −1.0 −
+0.5 to +1.0 V
Vref(pos)
positive reference voltage
1.95
2.15
2.35
V
Vref(neg)
negative reference voltage
0.95
1.15
1.35
V
Voffset
input offset voltage
−25
−
+25
mV
Ri
input resistance (VIP or VIM)
−
10
−
k
Ω
Ci
input capacitance (VIP or VIM)
−
510
pF
B
input full power bandwidth
3 dB bandwidth
40
50
−
MHz



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