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XRT79L71 Fiches technique(PDF) 9 Page - Exar Corporation |
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XRT79L71 Fiches technique(HTML) 9 Page - Exar Corporation |
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9 / 109 page ![]() XRT79L71 6 REV. 1.0.0 1-CHANNEL DS3/E3 ATM UNI/PPP/CLEAR-CHANNEL FRAMER IC - HARDWARE A16 ALE/AS I Address Latch Enable/Address Strobe: The exact function of this input pin depends upon which mode the Microprocessor Interface has been configured to operate in. Intel-Asynchronous Mode - ALE If the Microprocessor Interface of the XRT79L71 has been configured to operate in the Intel-Asynchronous Mode, then this active-"High" input pin is used to latch the address (present at the Microprocessor Interface Address Bus pins (A[14:0]) into the XRT79L71 Microprocessor Interface block and to indicate the start of a READ or WRITE cycle. Pulling this input pin "High" enables the input bus drivers for the Address Bus input pins (A[14:0]). The contents of the Address Bus will be latched into the XRT79L71 Microprocessor Interface circuitry, upon the falling edge of this input signal. Motorola-Asynchronous (68K) Mode - AS If the Microprocessor Interface has been configured to operate in the Motorola-Asyn- chronous Mode, then this active-"Low" input pin is used to latch the data (residing on the Address Bus, A[14:0]) into the Microprocessor Interface circuitry of the XRT79L71. Pulling this input pin "Low" enables the input bus drivers for the Address Bus input pins. The contents of the Address Bus will be latched into the Microprocessor Inter- face circuitry, upon the rising edge of this signal. Power PC 403 Mode - No Function - Tie to GND: If the Microprocessor Interface has been configured to operate in the Power PC 403 Mode, then this input pin has no role nor function and should be tied to GND. D14 CS I Chip Select Input: The user must assert this active "Low" signal in order to select the Microprocessor Interface for READ and WRITE operations between the Microprocessor and the XRT79L71 on-chip registers and buffer/memory locations. D13 INT O Interrupt Request Output: This active-"Low" output signal will be asserted when the XRT79L71 is requesting interrupt service from the Microprocessor. This output pin should typically be con- nected to the Interrupt Request input of the Microprocessor. PIN DESCRIPTIONS PIN #NAME TYPE DESCRIPTION |
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