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MC68HC908GR4MP Fiches technique(PDF) 47 Page - Freescale Semiconductor, Inc |
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MC68HC908GR4MP Fiches technique(HTML) 47 Page - Freescale Semiconductor, Inc |
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47 / 286 page ![]() Interrupts MC68HC908GR8 • MC68HC908GR4 Data Sheet, Rev. 7 Freescale Semiconductor 47 4.3.1 Effects An interrupt: • Saves the CPU registers on the stack. At the end of the interrupt, the RTI instruction recovers the CPU registers from the stack so that normal processing can resume. • Sets the interrupt mask (I bit) to prevent additional interrupts. Once an interrupt is latched, no other interrupt can take precedence, regardless of its priority. • Loads the program counter with a user-defined vector address Figure 4-3. Interrupt Stacking Order CONDITION CODE REGISTER ACCUMULATOR INDEX REGISTER (LOW BYTE)* PROGRAM COUNTER (HIGH BYTE) PROGRAM COUNTER (LOW BYTE) • • • • • • 1 2 3 4 5 5 4 3 2 1 STACKING ORDER *High byte of index register is not stacked. $00FF DEFAULT ADDRESS ON RESET UNSTACKING ORDER |
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