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PLV1812MDDFREP Fiches technique(PDF) 16 Page - Texas Instruments |
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PLV1812MDDFREP Fiches technique(HTML) 16 Page - Texas Instruments |
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16 / 33 page ![]() R1 R2 VA1 R3 VO High +VCC R2 VA2 R3 VO Low +VCC R1 Figure 6-4. Inverting Configuration Resistor Equivalent Networks When VIN is less than VA, the output voltage is high (for simplicity, assume VO switches as high as VCC). The three network resistors can be represented as R1 || R3 in series with R2, as shown in Figure 6-4. Equation 1 below defines the high-to-low trip voltage (VA1). V = V A1 CC ´ R2 (R1 || R3) + R2 (1) When VIN is greater than VA, the output voltage is low. In this case, the three network resistors can be presented as R2 || R3 in series with R1, as shown in Equation 2. Use Equation 2 to define the low to high trip voltage (VA2). V = V A2 CC ´ R2 || R3 R1 + (R2 || R3) (2) Equation 3 defines the total hysteresis provided by the network. D - V = V V A A1 A2 (3) 6.1.2.2 Non-Inverting Comparator With Hysteresis A non-inverting comparator with hysteresis requires a two-resistor network and a voltage reference (VREF) at the inverting input, as shown in Figure 6-5. VREF 2.5 V R2 1 0Ÿ + ± R1 330 NŸ VO VA 5 V 0 V VIN2 VIN1 VO 1.675 V 3.325 V VIN VIN Figure 6-5. TLV1812-EP in a Non-Inverting Configuration With Hysteresis The equivalent resistor networks when the output is high and low are shown in Figure 6-6. TLV1812-EP, TLV1822-EP SNOSDJ3 – MAY 2024 www.ti.com 16 Submit Document Feedback Copyright © 2024 Texas Instruments Incorporated Product Folder Links: TLV1812-EP TLV1822-EP |
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