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Moteur de recherche de fiches techniques de composants électroniques |
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Moteur de recherche de fiches techniques de composants électroniques |
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DSP56366P Fiches technique(PDF) 25 Page - Freescale Semiconductor, Inc |
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DSP56366P Fiches technique(HTML) 25 Page - Freescale Semiconductor, Inc |
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25 / 110 page  DSP56366 Technical Data, Rev. 3.1 Freescale Semiconductor 2-21 2.13 JTAG/OnCE Interface Table 2-15 JTAG/OnCE Interface Signal Name Signal Type State during Reset Signal Description TCK Input Input Test Clock—TCK is a test clock input signal used to synchronize the JTAG test logic. It has an internal pull-up resistor. This input is 5 V tolerant. TDI Input Input Test Data Input—TDI is a test data serial input signal used for test instructions and data. TDI is sampled on the rising edge of TCK and has an internal pull-up resistor. This input is 5 V tolerant. TDO Output Tri-stated Test Data Output—TDO is a test data serial output signal used for test instructions and data. TDO is tri-statable and is actively driven in the shift-IR and shift-DR controller states. TDO changes on the falling edge of TCK. TMS Input Input Test Mode Select—TMS is an input signal used to sequence the test controller’s state machine. TMS is sampled on the rising edge of TCK and has an internal pull-up resistor. This input is 5 V tolerant. |
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