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56F8322 Fiches technique(PDF) 98 Page - Freescale Semiconductor, Inc |
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56F8322 Fiches technique(HTML) 98 Page - Freescale Semiconductor, Inc |
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98 / 136 page ![]() 56F8322 Techncial Data, Rev. 16 98 Freescale Semiconductor Preliminary Part 8 General Purpose Input/Output (GPIO) 8.1 Introduction This section is intended to supplement the GPIO information found in the 56F8300 Peripheral User Manual and contains only chip-specific information. This information supercedes the generic information in the 56F8300 Peripheral User Manual. 8.2 Configuration There are three GPIO ports defined on the 56F8322/56F8122. The width of each port and the associated peripheral function is shown in Table 8-1 and Table 8-2. The specific mapping of GPIO port pins is shown in Table 8-3. Table 8-1 56F8322 GPIO Ports Configuration GPIO Port Port Width Available Pins in 56F8322 Peripheral Function Reset Function A12 7 PWM, SPI 1 PWM B8 8 SPI 0, DEC 0, TMRA, SCI 1 SPI 0, DEC 0 C7 6 XTAL, EXTAL, CAN, TMRC, SCI 0 XTAL, EXTAL, CAN, TMRC Table 8-2 56F8122 GPIO Ports Configuration GPIO Port Port Width Available Pins in 56F8122 Peripheral Function Reset Function A12 7 SPI 1 Must be reconfigured B8 8 SPI 0, SCI1, TMRA SPI 0, other pins must be reconfigured C7 6 XTAL, EXTAL, TMRC, SCI 0 XTAL, EXTAL, TMRC; other pins must be reconfigured |
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