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AT90USB646 Fiches technique(PDF) 52 Page - ATMEL Corporation |
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AT90USB646 Fiches technique(HTML) 52 Page - ATMEL Corporation |
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52 / 435 page ![]() 52 7593D–AVR–07/06 AT90USB64/128 • Bit 0 – PLOCK: PLL Lock Detector When the PLOCK bit is set, the PLL is locked to the reference clock, and it is safe to enable PCK for Timer/Counter1. After the PLL is enabled, it takes about 100 ms for the PLL to lock. To clear PLOCK, clear PLLE and PLLPx bits. |
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