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PCF2131 Fiches technique(PDF) 64 Page - NXP Semiconductors |
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PCF2131 Fiches technique(HTML) 64 Page - NXP Semiconductors |
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64 / 85 page ![]() NXP Semiconductors PCF2131 Nano-power highly accurate RTC with integrated quartz crystal 10 Dynamic characteristics 10.1 SPI-bus timing characteristics VDD = 1.2 V to 5.5 V; VSS = 0 V; Tamb = -40 °C to +105 °C, unless otherwise specified. All timing values are valid within the operating supply voltage at ambient temperature and referenced to VIL and VIH with an input voltage swing of VSS to VDD (see Figure 40). VDD = 1.2 V to 3.3 V VDD = 3.3 V to 5.5 V Symbol Parameter Conditions Min Max Min Max Unit Pin SCL fclk(SCL) SCL clock frequency - 0.5 - 6.5 MHz tclk(H) clock HIGH time 1000 - 70 - ns tclk(L) clock LOW time 1000 - 70 - ns tr rise time for SCL signal - 100 - 100 ns tf fall time for SCL signal - 100 - 100 ns Pin SDA/CE tsu(CE_N) CE_N set-up time 300 - 30 - ns th(CE_N) CE_N hold time 325 - 25 - ns trec(CE_N) CE_N recovery time 1500 - 1500 - ns tw(CE_N) CE_N pulse width - 0.99 - 0.99 s Pin SDI tsu set-up time set-up time for SDI data 250 - 20 - ns th hold time hold time for SDI data 250 - 20 - ns Pin SDO td(R)SDO SDO read delay time CL = 50 pF - 550 - 55 ns tdis(SDO) SDO disable time [1] - 150 - 25 ns Table 91. SPI-bus characteristics [1] No load value; bus is held up by bus capacitance; use RC time constant with application values. PCF2131 All information provided in this document is subject to legal disclaimers. © 2023 NXP B.V. All rights reserved. Product data sheet Rev. 2.0 — 5 October 2023 64 / 85 |
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