AM29BDS128HE8VKI datasheet(75/89 Pages) AMD

No de pièce	AM29BDS128HE8VKI

Description	128 or 64 Megabit (8 M or 4 M x 16-Bit) CMOS 1.8 Volt-only Simultaneous Read/Write, Burst Mode Flash Memory

PDF	89 Pages

Scroll/Zoom	100%

Fabricant	AMD [Advanced Micro Devices]

Site Internet	http://www.amd.com

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75 / 89 page

May 10, 2006 27024B3

Am29BDS128H/Am29BDS640H

D A TA

SH EE T

AC CHARACTERISTICS

Notes:

1. PA = Program Address, PD = Program Data, VA = Valid Address for reading status bits.

2. “In progress” and “complete” refer to status of program operation.

3. Amax–A12 are don’t care during command sequence unlock cycles.

4. Addresses are latched on the first of either the rising edge of AVD# or the active edge of CLK.

5. Either CE# or AVD# is required to go from low to high in between programming command sequences.

6. The Synchronous programming operation is dependent of the Set Device Read Mode bit in the Configuration Register. The

Configuration Register must be set to the Synchronous Read Mode.

Figure 37.

Synchronous Program Operation Timings: CLK Latched Addresses

OE#

CE#f

Data

Addresses

AVD#

WE#

CLK

VCCf

555h

tWC

tWPH

tWP

tVCS

tDH

tCH

Progress

tWHWH1

Complete

Program Command Sequence (last two cycles)

Read Status Data

tDS

tAVDP

A0h

tAS

tCAS

tAH

tAVCH

tCSW

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