AM29F002BB-55JC datasheet(16/42 Pages) AMD

16 / 42 page

Am29F002B/Am29F002NB

21527D5 November 1, 2006

D A TA

SH EE T

interrupts can be re-enabled after the last Sector Erase

command is written. If the time between additional

sector erase commands can be assumed to be less

than 50 µs, the system need not monitor DQ3. Any

command other than Sector Erase or Erase

Suspend during the time-out period resets the

device to reading array data. The system must

rewrite the command sequence and any additional

sector addresses and commands.

The system can monitor DQ3 to determine if the sector

erase timer has timed out. (See the “DQ3: Sector Erase

Timer” section.) The time-out begins from the rising

edge of the final WE# pulse in the command sequence.

Once the sector erase operation has begun, only the

Erase Suspend command is valid. All other commands

are ignored. On the Am29F002B only, note that a hard-

ware reset dur ing the sector erase operation

immediately terminates the operation. The Sector

Erase command sequence should be reinitiated once

the device has returned to reading array data, to

ensure data integrity.

When the Embedded Erase algorithm is complete, the

device returns to reading array data and addresses are

no longer latched. The system can determine the

status of the erase operation by using DQ7, DQ6, or

DQ2. Refer to “Write Operation Status” for information

on these status bits.

Figure 3 illustrates the algorithm for the erase opera-

tion. Refer to the Erase/Program Operations tables in

the “AC Characteristics” section for parameters, and to

the Sector Erase Operations Timing diagram for timing

waveforms.

Notes:

1. See the appropriate Command Definitions table for erase

command sequence.

2. See “DQ3: Sector Erase Timer” for more information.

Figure 3.

Erase Operation

START

Write Erase

Command Sequence

Data Poll

from System

Data = FFh?

Yes

Erasure Completed

Embedded

Erase

algorithm

in progress

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