EST7502B

PC Power Supply PWM with Supervisor

www.esthome.com

6

2007-10-15 V2

4. Under Voltage Protection Delay Time：

5. Pulse Width Modulation Block：

The output pulse width modulation is generated by comparison of the saw–tooth

waveform from the capacitor CT to the feedback of the voltage.

Therefore, an increase in feedback control signal amplitude cause a linear decrease of the

output pulse width. Also, the SS(DTC and Soft-Start) limits the output pulse width. The

timing diagram is shown as below:

6. The function of “PT”:

This signal is prepared for extra OVP/OPP (VPT > 1.28V) or another Disable Under

Voltage Protection function (VPT < 0.62V)

REM

REMON

UVP

td,uvp

CT

FF-Q

FF-CLK

C2

C1

FF-QN

DTC

PWM OUT