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AD8313 Fiches technique(PDF) 14 Page - Analog Devices |
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AD8313 Fiches technique(HTML) 14 Page - Analog Devices |
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14 / 24 page ![]() AD8313 Rev. D | Page 14 of 24 SETPOINT INTERFACE, VSET The setpoint interface is shown in Figure 28. The voltage, VSET, is divided by a factor of 3 in a resistive attenuator of 18 kΩ total resistance. The signal is converted to a current by the action of the op amp and the resistor R3 (1.5 kΩ), which balances the current generated by the summed output of the nine detector cells at the input to the previous cell. The logarithmic slope is nominally 3 µs × 4.0 µA/dB × 1.5 kΩ = 18 mV/dB. 8 VSET VPOS R1 12k Ω R2 6k Ω 6 COMM 25 µA 25 µA FDBK TO O/P STAGE 1 R3 1.5k Ω LP Figure 28. Setpoint Interface Circuitry |
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