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WM8593 Fiches technique(PDF) 61 Page - Wolfson Microelectronics plc |
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WM8593 Fiches technique(HTML) 61 Page - Wolfson Microelectronics plc |
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61 / 98 page ![]() Product Preview WM8593 w PP Rev 1.0 January 2007 61 Figure 27 R3 – DAC1 Control Register 2 Figure 28 R4 – DAC1 Control Register 3 R3 (03h) – DAC1 Control Register 2 (DAC1_CTRL2) Bit # 15 14 13 12 11 10 9 8 Read 0 0 0 0 0 0 0 0 Write N/A N/A N/A N/A N/A N/A N/A N/A Default 0 0 0 0 0 0 0 0 Bit # 7 6 5 4 3 2 1 0 Read 0 0 Write N/A N/A DAC1_BCLKDIV[2:0] DAC1_SR[2:0] Default 0 0 0 0 0 0 0 0 N/A = Not Applicable (no function implemented) Function Description DAC1_SR[2:0] DAC1 MCLK:LRCLK Ratio 000 = Auto detect 001 = 128fs 010 = 192fs 011 = 256fs 100 = 384fs 101 = 512fs 110 = 768fs 111 = 1152fs DAC1_ BCLKDIV [2:0] DAC1 BCLK Rate 000 = MCLK / 4 001 = MCLK / 8 010 = 32fs 011 = 64fs 100 = 128fs All other values of DAC1_BCLKDIV[2:0] are reserved R4 (04h) – DAC1 Control Register 3 (DAC1_CTRL3) Bit # 15 14 13 12 11 10 9 8 Read 0 0 0 0 0 0 0 0 Write N/A N/A N/A N/A N/A N/A N/A N/A Default 0 0 0 0 0 0 0 0 Bit # 7 6 5 4 3 2 1 0 Read 0 0 0 0 0 0 0 Write N/A N/A N/A N/A N/A N/A N/A DAC1_MSTR Default 0 0 0 0 0 0 0 0 N/A = Not Applicable (no function implemented) Function Description DAC1_MSTR DAC1 Master Mode Select 0 = Slave mode, DACBCLK1 and DACLRCLK1 are inputs to WM8593 1 = Master mode, DACBCLK1 and DACLRCLK1 are outputs from WM8593 |
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