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ES9842PRO Fiches technique(PDF) 126 Page - ESS Technology,Inc |
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ES9842PRO Fiches technique(HTML) 126 Page - ESS Technology,Inc |
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126 / 167 page ![]() CONFIDENTIAL ADVANCE INFORMATION ES9842 PRO Product Datasheet 126 VERSION 0.5 ESS TECHNOLOGY, INC. 109 Bonaventura Drive, San Jose, CA 95134, USA Tel (408) 643-8800 WWW.ESSTECH.COM Register 121-120: ADC CH2 THD COMP DATA Bits [15:0] Default 16'd0 Bits Mnemonic Description [15:0] ADC2_CORRECTION_DATA A 16 bits THD corrected value that will be written to the address of the THD compensation RAM. Maximum -42dB (16'hFFFF). Register 122: ADC CH2 PEAK DETECTOR CONFIG Bits [7] [6:2] [1] [0] Default 1'b0 5'd0 1'b0 1'b0 Bits Mnemonic Description [7] ADC2_LOCK_PEAK Locks the stored value of the peak detector for reading back. • 1'b0: Stored value is allowed to update (default) • 1'b1: Stored value is locked [6:2] ADC2_DECAY_RATE Sets the speed at which the peak detector value will decay when greater than the input signal. • 5'd0: Instant decay • 5'd1: Fastest decay • 5'd10: Default value • 5'd22: Slowest decay • Others: Reserved [1] RESERVED NA [0] ADC2_ENABLE_PEAK_DETECT Enables the ADC signal peak detector. • 1'b0: Disabled (default) • 1'b1: Enabled |
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