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M58LR128HT Fiches technique(PDF) 44 Page - STMicroelectronics |
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M58LR128HT Fiches technique(HTML) 44 Page - STMicroelectronics |
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44 / 112 page ![]() Configuration Register M58LR128HT, M58LR128HB 44/112 Figure 5. X-Latency and data output configuration example 1. The settings shown are X-latency = 4, Data Output held for one clock cycle. Figure 6. Wait configuration example Ai11072 A22-A0(1) VALID ADDRESS K L DQ15-DQ0 VALID DATA X-latency VALID DATA tK tQVK_CPU tKQV 1st cycle 2nd cycle 3rd cycle 4th cycle E AI06972 A22-A0 VALID ADDRESS K L DQ15-DQ0 VALID DATA WAIT CR8 = '0' CR10 = '0' WAIT CR8 = '1' CR10 = '0' VALID DATA NOT VALID VALID DATA E WAIT CR8 = '0' CR10 = '1' WAIT CR8 = '1' CR10 = '1' |
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