ST62T30B datasheet(31/84 Pages) STMICROELECTRONICS

No de pièce	ST62T30B

Description	8-BIT OTP/EPROM MCUs WITH A/D CONVERTER, 16-BIT AUTO-RELOAD TIMER, EEPROM, SPI AND UART

PDF	84 Pages

Scroll/Zoom	100%

Fabricant	STMICROELECTRONICS [STMicroelectronics]

Site Internet	http://www.st.com

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ST62T30B ST62E30B

INTERRUPTS (Cont’d)

3.4.3 Interrupt Option Register (IOR)

The Interrupt Option Register (IOR) is used to en-

able/disable the individual interrupt sources and to

select the operating mode of the external interrupt

inputs. This register is write-only and cannot be

accessed by single-bit operations.

Address: 0C8h

—

Write Only

Reset status: 00h

Bit 7, Bits 3-0 =

Unused.

Bit 6 = LES:

Level/Edge Selection bit.

When this bit is set to one, the interrupt source #1

is level sensitive. When cleared to zero the edge

sensitive mode for interrupt request is selected.

Bit 5 = ESB:

Edge Selection bit.

The bit ESB selects the polarity of the interrupt

source #2.

Bit 4 = GEN:

Global Enable Interrupt. When this bit

is set to one, all interrupts are enabled. When this

bit is cleared to zero all the interrupts (excluding

NMI) are disabled.

When the GEN bit is low, the NMI interrupt is ac-

tive but cannot cause a wake up from STOP/WAIT

modes.

This register is cleared on reset.

LES

ESB

GEN

ST62T30B Fiches technique(PDF) 31 Page - STMicroelectronics