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M41T93 Fiches technique(PDF) 7 Page - STMicroelectronics |
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M41T93 Fiches technique(HTML) 7 Page - STMicroelectronics |
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7 / 49 page ![]() M41T93 Summary description 7/49 Figure 1. Logic diagram 1. For QFN16 package only. 2. Defaults to 32kHz on power-up. 3. Open drain 1. For QFN16 package only. 2. Defaults to 32kHz on power-up. 3. DU pin must be allowed to float (remain unconnected) Table 1. Signal name Symbol Description XI(1) 32kHz oscillator input XO(1) 32kHz oscillator output IRQ/FT/OUT Interrupt /frequency test/output driver (open drain) SQW(2) 32kHz programmable square wave output RST Power-on reset output (open drain) E Chip enable SDI Serial data address input SDO Serial data address output SCL Serial clock input VBAT Battery supply voltage (Tie VBAT to VSS if no battery is connected.) DU(3) Do not use VCC Supply voltage VSS Ground SDI VCC VSS VBAT SCL RST (3) E IRQ/OUT/FT (3) SQW (2) SDO XI (1) XO (1) AI11818 |
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