RT9205SLASHACS datasheet(12/16 Pages) RICHTEK

12 / 16 page

RT9205/A

Preliminary

www.richtek.com

DS9205/A-03 May 2003

Input / Output Capacitor

High frequency/long life decoupling capacitors should

be placed as close to the power pins of the load as

physically possible. Be careful not to add inductance

to the PCB trace, as it could eliminate the

performance from utilizing these low inductance

components. Consult with the manufacturer of the

load on specific decoupling requirements.

The output capacitors are necessary for filtering

output and stabilizing the close loop (see the PWM

loop stability). For powering advanced high-speed

processors, it is required to meet fast load transient

requirement. Also high ESR usually induces ripple

that may trigger UV or OV protections. So High

frequency capacitors with low ESR/ESL capacitors

are recommended here.

Linear Regulator Driver

The linear controller of RT9205/A was designed to

drive an external bipolar NPN transistor or a N-

channel MOSFET. For a N-channel MOSFET,

normally

DRV

need

provide

minimum

VOUT2+VT+gate-drive voltage to keep VOUT2 as the

set voltage. When driving MOSFET operating at a 5V

power supply, the gate-drive will be limited at 5V. At

this situation, as shown in Fig.7, a MOSFET with low

VT threshold (VT = 1V) and set Vout2 below 2.5V are

suggested. In VBOOT = 12V operation condition, as

Fig.8 shown, VCC is regulated higher than 6V, which

providing higher gate-drive capability for driving the

MOSFET, VOUT2 can be set as VOUT2 ≤ 3.3V.

Fig. 7

Fig. 8

PWM Loop Stability

The RT9205/A is a voltage mode buck controller

designed for 5V step-down applications. The gain of

error amplifier is fixed at 35dB for simplifying design.

The output amplitude of ramp oscillator is 1.6V, the

loop gain and loop pole/zero are calculated as

follows:

DC loop gain GA = 35dB ×

LC filter pole PO =

Error Amp pole PA = 300kHz

ESR zero ZO =

The RT9205/A Bode plot is as shown in Fig.9. It is

stable in most of application conditions.

Loop Gain

VOUT = 1.5V

VOUT = 2.5V

VOUT = 3.3V

ZO = 3.2kHz

PO = 2.9kHz

L=2

µH

COUT = 1500µF(33mΩ)

VOUT = 3.3V

100k

10k

100

Fig. 9

VOUT

FBL

VCC

RT9205/A

VOUT2 ≤ 3.3V

BOOT

DRV

VBOOT = 12V

< 1K

Max. 6V

Suggest Low

VT MOSFET

FBL

VCC

RT9205/A

VOUT2 ≤ 2.5V

BOOT

DRV

VCC = 5V

< 1K

Max. 5V

Suggest Low

VT MOSFET

2π

ESR

2π

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