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AD9237 Fiches technique(PDF) 28 Page - Analog Devices |
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AD9237 Fiches technique(HTML) 28 Page - Analog Devices |
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28 / 28 page ![]() AD9237 Rev. 0 | Page 28 of 28 OUTLINE DIMENSIONS COMPLIANT TO JEDEC STANDARDS MO-220-VHHD-2 0.30 0.23 0.18 0.20 REF 0.80 MAX 0.65 TYP 0.05 MAX 0.02 NOM 12° MAX 1.00 0.85 0.80 SEATING PLANE COPLANARITY 0.08 1 32 8 9 25 24 16 17 0.50 0.40 0.30 3.50 REF 0.50 BSC PIN 1 INDICATOR TOP VIEW 5.00 BSC SQ 4.75 BSC SQ 3.25 3.10 SQ 2.95 PIN 1 INDICATOR 0.60 MAX 0.60 MAX 0.25 MIN EXPOSED PAD (BOTTOM VIEW) Figure 57. 32-Lead Lead Frame Chip Scale Package [LFCSP_VQ] 5 mm × 5 mm Body, Very Thin Quad (CP-32-2) Dimensions shown in millimeters ORDERING GUIDE Model Temperature Range Package Description Package Option AD9237BCPZ-201, 2 –40°C to +85°C 32-Lead Lead Frame Chip Scale Package (LFCSP_VQ) CP-32-2 AD9237BCPZRL7-201, 2 –40°C to +85°C 32-Lead Lead Frame Chip Scale Package (LFCSP_VQ) CP-32-2 AD9237BCPZ-401, 2 –40°C to +85°C 32-Lead Lead Frame Chip Scale Package (LFCSP_VQ) CP-32-2 AD9237BCPZRL7-401, 2 –40°C to +85°C 32-Lead Lead Frame Chip Scale Package (LFCSP_VQ) CP-32-2 AD9237BCPZ-651, 2 –40°C to +85°C 32-Lead Lead Frame Chip Scale Package (LFCSP_VQ) CP-32-2 AD9237BCPZRL7-651, 2 –40°C to +85°C 32-Lead Lead Frame Chip Scale Package (LFCSP_VQ) CP-32-2 AD9237BCP-20EB Evaluation Board AD9237BCP-40EB Evaluation Board AD9237BCP-65EB Evaluation Board T 1 Z = Pb-free part. 2 It is recommended that the exposed paddle be soldered to the ground plane. There is an increased reliability of the solder joints and maximum thermal capability of the package is achieved with exposed paddle soldered to the customer board. © 2005 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D05455–0–10/05(0) TTT |
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