ST72325 datasheet(16/193 Pages) STMICROELECTRONICS

16 / 193 page

ST72325

16/193

Notes for Table 1 and Table 2:

1. In the interrupt input column, “eiX” defines the associated external interrupt vector. If the weak pull-up

column (wpu) is merged with the interrupt column (int), then the I/O configuration is pull-up interrupt input,

else the configuration is floating interrupt input.

2. In the open drain output column, “T” defines a true open drain I/O (P-Buffer and protection diode to VDD

are not implemented). See See “I/O PORTS” on page 50. and Section 12.8 I/O PORT PIN CHARACTER-

ISTICS for more details.

3. OSC1 and OSC2 pins connect a crystal/ceramic resonator, or an external source to the on-chip oscil-

lator; see Section 1 INTRODUCTION and Section 12.5 CLOCK AND TIMING CHARACTERISTICS for

more details.

4. On the chip, each I/O port may have up to 8 pads. Pads that are not bonded to external pins are in input

pull-up configuration after reset. The configuration of these pads must be kept at reset state to avoid add-

ed current consumption.

PB0/PWM3

I/O CT

ei2

Port B0

PWM Output 3

Caution: Negative current injec-

tion not allowed on this pin5)

PB3/PWM0

I/O CT

ei2

Port B3

PWM Output 0

PB4 (HS)/ARTCLK

I/O CT HS

ei3

Port B4

PWM-ART External Clock

PD0/AIN0

I/O CT

Port D0

ADC Analog Input 0

PD1/AIN1

I/O CT

Port D1

ADC Analog Input 1

Pin n°

Pin Name

Level

Port

Main

function

(after

reset)

Alternate function

Input

Output

ST72325 Fiches technique(PDF) 16 Page - STMicroelectronics

ST72325 Fiches technique(HTML) 16 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Fiches technique Télécharger

Lien URL