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STLM20W8 Fiches technique(PDF) 13 Page - STMicroelectronics |
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STLM20W8 Fiches technique(HTML) 13 Page - STMicroelectronics |
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13 / 17 page ![]() STLM20 Package mechanical 13/17 7 Package mechanical In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a Lead-free second level interconnect. The category of second Level Interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com. Figure 5. SOT323-5 – 5-lead small outline transistor package outline 1. Drawing is not to scale. Table 8. SOT323-5 – 5-lead small outline transistor package mechanical data Symbol mm inches Typ Min Max Typ Min Max A – 0.80 1.10 – 0.031 0.043 A1 – 0 0.10 – 0 0.004 A2 0.90 – – 0.035 – – b – 0.15 0.30 – 0.006 0.012 C – 0.10 0.20 – 0.004 0.008 D 2.00 1.90 2.10 0.079 0.075 0.083 E – 1.80 2.40 – 0.071 0.094 E1 1.25 1.15 1.35 0.049 0.045 0.053 e0.65– – 0.026 – – e1 1.30 – – 0.051 – – L0.52– – 0.020 – – L1 0.40 0.35 0.45 0.016 0.014 0.018 s– 0° 5° – 0° 5° SOT323-5 0.10 C A A2 A1 5X C e1 D e 5X b E B E1 A M 0.10 C A B s s 1 C L1 s L C |
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