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TLV3012 Fiches technique(PDF) 28 Page - Texas Instruments |
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TLV3012 Fiches technique(HTML) 28 Page - Texas Instruments |
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28 / 39 page ![]() (REF) and logic low level of the comparator output is referenced to (V-). Output capacitive loading and output toggle rate will cause the average supply current to rise over the quiescent current in the EC Table. 10.5 Layout 10.5.1 Layout Guidelines To minimize supply noise, power supplies should be capacitively decoupled by a 0.1-μF ceramic capacitor. Comparators are sensitive to input noise and precautions such as proper grounding (use of ground plane), supply bypassing, and guarding of high-impedance nodes minimize the effects of noise and help to ensure specified performance. 10.5.2 Layout Example V- V+ REF IN- IN+ GND OUT VIN V S GND GND OUT C1 R1 R2 SOT-23 Figure 10-7. Layout Example TLV3011-Q1, TLV3012-Q1, TLV3011B-Q1, TLV3012B-Q1 SBOS551C – MARCH 2011 – REVISED APRIL 2023 www.ti.com 28 Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated Product Folder Links: TLV3011-Q1 TLV3012-Q1 TLV3011B-Q1 TLV3012B-Q1 |
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