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Moteur de recherche de fiches techniques de composants électroniques |
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AT25QL641 Fiches technique(PDF) 44 Page - Renesas Technology Corp |
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AT25QL641 Fiches technique(HTML) 44 Page - Renesas Technology Corp |
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44 / 80 page  DS-AT25QL641-130 Rev. G Page 44 Sep 14, 2022 © 2022 Renesas Electronics AT25QL641 Datasheet Unexpected power off during the Erase/Program suspend state resets the device and release the suspend state. The SUS bit in the Status Register also resets to 0. The data within the page, or block that was being suspended may become corrupted. It is recommended for the user to implement system design techniques against the accidental power interruption and preserve data integrity during erase/program suspend state. (See Figure 36 and Figure 37.) Figure 36. Erase Suspend Command (SPI Mode) Figure 37. Erase Suspend Command (QPI Mode) SCK CS SI SO 1 0 234 6 57 Command t SUS 75h Mode 3 Mode 0 High-Impedance Mode 3 Mode 0 Accept commands SCK CS 1 0 Mode 3 Command 75h Mode 0 Mode 3 Accept commands Mode 0 t SUS IO 0 IO 1 IO 2 IO 3 |
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