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ST25R3912 Fiches technique(PDF) 13 Page - STMicroelectronics |
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ST25R3912 Fiches technique(HTML) 13 Page - STMicroelectronics |
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13 / 130 page ![]() DS11794 Rev 9 13/130 ST25R3912 Functional overview 66 1.1.11 FIFO The ST25R3912 contains a 96-byte FIFO. Depending on the mode, it contains either data that has been received or data to be transmitted. 1.1.12 Control logic The control logic contains I/O registers that define operation of device. 1.1.13 SPI A 4-wire serial peripheral interface (SPI) is used for communication between the external microcontroller and the ST25R3912. 1.2 Application information The minimum configurations required to operate the ST25R3912 are shown in Figure 2 and Figure 3. Figure 2. Minimum configuration with single sided antenna driving (including EMC filter) MS42436V2 ST25R3912 VDD /SS MISO MOSI SCLK IRQ MCU_CLK RF01 RF02 RFI1 RFI2 MCU 2.4 to 5.5 V AGD VSS VSP_A VSP_RF VSN_RF VSN_A VDD_IO XTI XTO 1.65 to 5.5 V VSP_D VSN_D Antenna coil |
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