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93LC86ATIMCG Fiches technique(PDF) 7 Page - Microchip Technology

No de pièce 93LC86ATIMCG
Description  16K Microwire Compatible Serial EEPROM
PDF  28 Pages
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Fabricant  MICROCHIP [Microchip Technology]
Site Internet  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

93LC86ATIMCG Fiches technique(HTML) 7 Page - Microchip Technology

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© 2005 Microchip Technology Inc.
DS21797G-page 7
93AA86A/B/C, 93LC86A/B/C, 93C86A/B/C
2.4
Erase
The ERASE instruction forces all data bits of the
specified address to the logical ‘1’ state. The rising
edge of CLK before the last address bit initiates the
write cycle.
The DO pin indicates the Ready/Busy status of the
device if CS is brought high after a minimum of 250 ns
low (TCSL). DO at logical ‘0’ indicates that programming
is still in progress. DO at logical ‘1’ indicates that the
register at the specified address has been erased and
the device is ready for another instruction.
FIGURE 2-1:
ERASE TIMING
Note:
After the Erase cycle is complete, issuing
a Start bit and then taking CS low will clear
the Ready/Busy status from DO.
CS
CLK
DI
DO
TCSL
Check Status
11
1
AN
AN-1
AN-2
•••
A0
TSV
TCZ
Busy
Ready
High-Z
TWC
High-Z



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