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74HC367DB Fiches technique(PDF) 2 Page - NXP Semiconductors

No de pièce 74HC367DB
Description  Hex buffer/line driver; 3-state
PDF  7 Pages
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Fabricant  PHILIPS [NXP Semiconductors]
Site Internet  http://www.nxp.com
Logo PHILIPS - NXP Semiconductors

74HC367DB Fiches technique(HTML) 2 Page - NXP Semiconductors

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December 1990
2
Philips Semiconductors
Product specification
Hex buffer/line driver; 3-state
74HC/HCT367
FEATURES
• Non-inverting outputs
• Output capability: bus driver
• ICC category: MSI
GENERAL DESCRIPTION
The 74HC/HCT367 are high-speed Si-gate CMOS devices
and are pin compatible with low power Schottky TTL
(LSTTL). They are specified in compliance with JEDEC
standard no. 7.
The 74HC/HCT367 are hex non-inverting buffer/line
drivers with 3-state outputs. The 3-state outputs (nY) are
controlled by the output enable inputs (1OE, 2OE).
A HIGH on nOE causes the outputs to assume a high
impedance OFF-state.
The “367” is identical to the “368” but has non-inverting
outputs.
QUICK REFERENCE DATA
GND = 0 V; Tamb =25 °C; tr =tf = 6 ns
Notes
1. CPD is used to determine the dynamic power dissipation (PD in µW):
PD =CPD × VCC2 × fi +∑ (CL × VCC2 × fo) where:
fi = input frequency in MHz
fo = output frequency in MHz
∑ (CL × VCC2 × fo) = sum of outputs
CL = output load capacitance in pF
VCC = supply voltage in V
2. For HC the condition is VI = GND to VCC
For HCT the condition is VI = GND to VCC − 1.5 V
ORDERING INFORMATION
See
“74HC/HCT/HCU/HCMOS Logic Package Information”.
SYMBOL
PARAMETER
CONDITIONS
TYPICAL
UNIT
HC
HCT
tPHL/ tPLH
propagation delay nA to nY
CL = 15 pF; VCC =5V
8
11
ns
CI
input capacitance
3.5
3.5
pF
CPD
power dissipation capacitance per buffer
notes 1 and 2
30
32
pF



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