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PIC16F15213 Fiches technique(PDF) 21 Page - Microchip Technology |
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PIC16F15213 Fiches technique(HTML) 21 Page - Microchip Technology |
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21 / 439 page ![]() 7.2 16-Level Stack with Overflow and Underflow These devices have a hardware stack memory 15 bits wide and 16 words deep. A Stack Overflow or Underflow will set the appropriate bit (STKOVF or STKUNF), and if enabled, will cause a software Reset. 7.3 File Select Registers There are two 16-bit File Select Registers (FSR). FSRs can access all file registers and program memory, which allows one Data Pointer for all memory. When an FSR points to program memory, there is one additional instruction cycle in instructions using INDF to allow the data to be fetched. General purpose memory can also be addressed linearly, providing the ability to access contiguous data larger than 80 bytes. 7.4 Instruction Set There are 50 instructions for the enhanced mid-range CPU to support the features of the CPU. See the “Instruction Set Summary” section for more details. PIC16F15213/14/23/24/43/44 Enhanced Mid-Range CPU © 2020-2022 Microchip Technology Inc. and its subsidiaries Data Sheet DS40002195E-page 21 |
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