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23LC1024 Fiches technique(PDF) 14 Page - Microchip Technology

No de pièce 23LC1024
Description  1-Mbit SPI Serial SRAM with SDI and SQI Interface
PDF  33 Pages
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Fabricant  MICROCHIP [Microchip Technology]
Site Internet  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

23LC1024 Fiches technique(HTML) 14 Page - Microchip Technology

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23A1024/23LC1024
DS20005142D-page 14
 2012-2022 Microchip Technology Inc. and its subsidiaries
4.0
DUAL AND QUAD SERIAL
MODE
The 23A1024/23LC1024 also supports SDI (Serial
Dual) and SQI (Serial Quad) mode of operation when
used with compatible host devices. As a convention for
SDI mode of operation, two bits are entered per clock
using the SIO0 and SIO1 pins. Bits are clocked MSB
first.
For SQI mode of operation, four bits of data are entered
per clock, or one nibble per clock. The nibbles are
clocked MSB first.
4.1
Dual Interface Mode
The 23A1024/23LC1024 supports Serial Dual Input
(SDI) mode of operation. To enter SDI mode the EDIO
command must be clocked in (Figure 4-1). It should be
noted that if the MCU resets before the SRAM, the user
will need to determine the serial mode of operation of
the SRAM and reset it accordingly. Byte read and write
sequence in SDI mode is shown in Figure 4-2 and
Figure 4-3.
FIGURE 4-1:
ENTER SDI MODE (EDIO) FROM SPI MODE
SCK
0
2
3
4567
1
SI
High-Impedance
SO
CS
00
0111
1
1



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