HANBit

HMF51232M4D

HANBit Electronics co., Ltd.

REV.02(August,2002)

4

3. Maximum Icc current specifications are tested with Vcc=Vcc max

ERASE AND PROGRAMMING PERFORMANCE

LIMITS

PARAMETER

MIN.

TYP.

MAX.

UNIT

COMMENTS

Sector Erase Time

-

1

8

sec

Chip Erase Time

8

64

sec

Excludes 00H programming

prior to erasure

Byte Programming Time

-

7

300

us

Chip Programming Time

-

3.6

10.8

sec

Excludes system-level

overhead

Notes:

1.

Typical program and erase times assume the follwing conditions:25

°,5.0Vcc,1,000,000cycles.

Additionally,programming typicals assume checkerboard pattern.

2.

Under worst case conditions of 90

°C, Vcc=4.5V(4.75V for-55), 1,000,000 cycles.

3.

The typical chip programming time is considerably less than the maximum chip programming time listed, since most

bytes program faster than the maximum byte program time listed. If the maximum byte program time given is

exceeded, only then does the device set DQ5= 1. See the section os DQ5for further information.

4.

In the pre-programming step of the Embedded Erase algorithm, all bytes are programmed to 00h before erasure.

5.

System-level overhead is the time required to execute the four-bus-cycle command sequence for programming. See

Table 4 for further in formation on command definitions.

6.

The device has a guaranteed minimum erase and program cycle endurance of 1,000,000cycles.

CAPACITANCE

PARAMETER

SYMBOL

PARAMETER

DESCRIPTION

TEST SETUP

TYP.

MAX

UNIT

Input Capacitance

6

7.5

pF

Output Capacitance

8.5

12

pF

Control Pin Capacitance

7.5

9

pF

TEST CONDITIONS

TEST CONDITION

-55

ALL OTHERS

UNIT

Output load

1 TTL gate

30

100

pF

Input Rise and Fall Times

5

20

ns

Input Pulse Levels

0~3

0.45~2.4

V