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AP61301 Fiches technique(PDF) 15 Page - Diodes Incorporated

No de pièce AP61301
Description  2.4V TO 5.5V INPUT, 3A LOW IQ SYNCHRONOUS BUCK CONVERTER
PDF  21 Pages
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Fabricant  DIODES [Diodes Incorporated]
Site Internet  http://www.diodes.com
Logo DIODES - Diodes Incorporated

AP61301 Fiches technique(HTML) 15 Page - Diodes Incorporated

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AP61300/AP61302
Document number: DS43404 Rev. 3 - 2
15 of 21
www.diodes.com
November 2022
© 2022 Copyright Diodes Incorporated. All Rights Reserved.
AP61300/AP61302
Application Information (continued)
6
Overcurrent Protection (OCP)
The AP6130Q/AP61302 has cycle-by-cycle valley current limit protection by sensing the current through the internal low-side power MOSFET, Q2.
While Q2 is on, the internal sensing circuitry monitors its conduction current. The overcurrent limit has a corresponding voltage limit, VLIMIT. When
the voltage between GND and SW is lower than VLIMIT due to excessive current through Q2, the OCP triggers, and the controller turns off Q2.
During this time, both Q1 and Q2 remain off. A new switching cycle begins only when the voltage between GND and SW rises above VLIMIT. If Q2
consistently hits the valley current limit for 0.6ms, the buck converter enters hiccup mode and shuts down. After 3.4ms of down time, the buck
converter restarts powering up. Hiccup mode reduces the power dissipation in the overcurrent condition.
The AP61300/AP61302 also has cycle-by-cycle peak current limit protection by sensing the current through the internal high-side power MOSFET,
Q1, through a similar mechanism as the cycle-by-cycle valley current limit protection.
Because the RDS(ON) values of the power MOSFETs increase with temperature, VLIMIT has a temperature coefficient of 0.4%/°C to compensate for
the temperature dependency of RDS(ON).
7
Thermal Shutdown (TSD)
If the junction temperature of the device reaches the thermal shutdown limit of +160°C, the AP61300/AP61302 shuts down both its high-side and
low-side power MOSFETs. When the junction temperature reduces to the required level (+130°C typical), the device initiates a normal power-up
cycle with soft-start.
8
Power Derating Characteristics
To prevent the regulator from exceeding the maximum recommended operating junction temperature, some thermal analysis is required. The
regulator’s temperature rise is given by:
������������������������������ = ������������ ∙ (������������������)
Eq. 3
Where:
PD is the power dissipated by the regulator
θJA is the thermal resistance from the junction of the die to the ambient temperature
The junction temperature, TJ, is given by:
������������ = ������������ + ������������������������������
Eq. 4
Where:
TA is the ambient temperature of the environment
For the SOT563 package, the
θJA is 141°C/W. The actual junction temperature should not exceed the maximum recommended operating junction
temperature of +125°C when considering the thermal design.



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