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Chapter 2: MAX II Architecture

Functional Description

MAX II Device Handbook

Altera Corporation

Figure 2–1 shows a functional block diagram of the MAX II device.

Each MAX II device contains a flash memory block within its floorplan. On the

EPM240 device, this block is located on the left side of the device. On the EPM570,

EPM1270, and EPM2210 devices, the flash memory block is located on the bottom-left

area of the device. The majority of this flash memory storage is partitioned as the

dedicated configuration flash memory (CFM) block. The CFM block provides the non-

volatile storage for all of the SRAM configuration information. The CFM

automatically downloads and configures the logic and I/O at power-up, providing

instant-on operation.

f For more information about configuration upon power-up, refer to the Hot Socketing

and Power-On Reset in MAX II Devices chapter in the MAX II Device Handbook.

A portion of the flash memory within the MAX II device is partitioned into a small

block for user data. This user flash memory (UFM) block provides 8,192 bits of

general-purpose user storage. The UFM provides programmable port connections to

the logic array for reading and writing. There are three LAB rows adjacent to this

block, with column numbers varying by device.

Table 2–1 shows the number of LAB rows and columns in each device, as well as the

number of LAB rows and columns adjacent to the flash memory area in the EPM570,

EPM1270, and EPM2210 devices. The long LAB rows are full LAB rows that extend

from one side of row I/O blocks to the other. The short LAB rows are adjacent to the

UFM block; their length is shown as width in LAB columns.

Figure 2–1. MAX II Device Block Diagram

Logic Array

BLock (LAB)

MultiTrack

Interconnect

MultiTrack

Interconnect

Logic

Element

Logic

Element

IOE

Logic

Element

Logic

Element

IOE

Logic

Element

Logic

Element

IOE

Logic

Element

Logic

Element

Logic

Element

Logic

Element

IOE

Logic

Element

Logic

Element

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