L99ASC03G datasheet(20/70 Pages) STMICROELECTRONICS

20 / 70 page

Device description

L99ASC03G

20/70

DocID029080 Rev 2

2.9

Wake-up events

A wake-up event in standby mode generates a transition to Active Mode. Three possible

wake-up sources are defined, as illustrated in Table 4.

All wake-up events from VDD Standby Mode generate a low-pulse on NINT pin for

56 μs (typical).

2.10

Charge pump

The two-stage charge pump is supplied from the VS pin. External charging capacitors are

used to achieve a high current capability of the charge pump. In VBAT Standby Mode, VDD

Standby Mode or after thermal shutdown the charge pump is disabled. It is also possible to

disable the charge pump by setting the CPDIS bit to "1".

In case the charge pump output voltage remains below the VCPLOW threshold for longer

than tfCP, all gate drivers are switched off (resistive path to source) and the CPLOW flag is

set and latched. The NRDY flag shows that the charge pump is not ready after a startup

condition.

In order to minimize electromagnetic emissions, the charge pump frequency can be

modulated in a programmable range through the WOBM and WOBF bits.

Figure 10. CPLOW and NRDY bit behavior

2.11

Gate drivers

Each of the three half-bridge drivers is controlled independently by dedicated inputs for the

high-side driver (IHx, active low, with internal pull-up resistor) and for the low-side driver

(ILx, active high, with internal pull-down resistor). All the gate drivers feature a minimum

cross-current protection time (dead-time) tCCP (programmable through the CCT bits) and

Table 4. Wake-up events

Wake-up source

Description

SPI Access

CSN pin low and first rising edge on SCK pin, active only in VDD

Standby Mode

INH

High level on the INH pin, active in both standby modes

L99ASC03G Fiches technique(PDF) 20 Page - STMicroelectronics