List of figures

Figure 1.

Block diagram .................................................................... 2

Figure 2.

Device pinout ..................................................................... 3

Figure 3.

Example of dual chip/Master-Expansion scenario ........................................... 11

Figure 4.

TQFP64 (10X10X1.0 mm, 6.0x6.0 mm exp. pad down) package outline............................ 12

Figure 5.

TQFP64 (10X10X1.0 mm, 6.0x6.0 mm exp. pad down) PCB footprint ............................. 14

L9689E

List of figures

DB4807 - Rev 2

page 18/19