LIS3L02AS4

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Table 2. Pin Description

Figure 3. Pin Connection (Top view)

N°

Pin

Function

1 to 5

NC

Internally not connected

6GND

0V supply

7

Vdd

Power supply

8

Vouty

Output Voltage

9

ST

Self Test (Logic 0: normal mode; Logic 1: Self-test)

10

Voutx

Output Voltage

11

PD

Power Down (Logic 0: normal mode; Logic 1: Power-Down mode)

12

Voutz

Output Voltage

13

FS

Full Scale selection (Logic 0: 2g Full-scale; Logic 1: 6g Full-scale)

14-15

Reserved

Leave unconnected or connect to Vdd

16

Reserved

Connect to Vdd or ground

17

Reserved

Leave unconnected or connect to Vdd

18

Reserved

Leave unconnected or connect to ground

19 to 24

NC

Internally not connected

NC

NC

NC

NC

NC

NC

Reserved

Reserved

Reserved

Reserved

Reserved

FS

NC

NC

NC

NC

NC

GND

Vdd

Vouty

ST

Voutx

PD

Voutz

DIRECTION OF THE

DETECTABLE

ACCELERATIONS

Y

1

13

Z

X