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CBTL05024BSHP Fiches technique(PDF) 5 Page - NXP Semiconductors |
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CBTL05024BSHP Fiches technique(HTML) 5 Page - NXP Semiconductors |
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5 / 21 page ![]() CBTL05024 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved. Product data sheet Rev. 4 — 27 March 2014 5 of 21 NXP Semiconductors CBTL05024 High performance MUX/deMUX switch for Thunderbolt applications 5. Pinning information 5.1 Pinning (1) Center pad is connected to PCB GND plane for electrical grounding and thermal relief. Refer to Section 10 for package-related information. Fig 2. Pin configuration 002aag998 17 Transparent top view TB_ENA HPD terminal 1 index area CBTL05024BS 15 LSTX 14 LSRX 13 CA_DETOUT 16 AUX− 3 1 VDD 4 DDC_DAT 5 DDC_CLK 2 AUX+ GND(1) |
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