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Moteur de recherche de fiches techniques de composants électroniques |
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Moteur de recherche de fiches techniques de composants électroniques |
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USB7002 Fiches technique(PDF) 46 Page - Microchip Technology |
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USB7002 Fiches technique(HTML) 46 Page - Microchip Technology |
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46 / 56 page  USB7002 DS00002670G-page 46 2022 Microchip Technology Inc. and its subsidiaries 9.7 Clock Specifications The device can accept either a 25MHz crystal or a 25MHz single-ended clock oscillator input. If the single-ended clock oscillator method is implemented, XTALO should be left unconnected and XTALI/CLK_IN should be driven with a nominal 0-3.3V clock signal. The input clock duty cycle is 40% minimum, 50% typical and 60% maximum. It is recommended that a crystal utilizing matching parallel load capacitors be used for the crystal input/output signals (XTALI/XTALO). The following circuit design (Figure 9-6) and specifications (Table 9-9) are required to ensure proper operation. FIGURE 9-6: 25MHZ CRYSTAL CIRCUIT USB7002 XTALO XTALI Y1 C1 C2 |
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