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SPC58EEX Fiches technique(PDF) 108 Page - STMicroelectronics |
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SPC58EEX Fiches technique(HTML) 108 Page - STMicroelectronics |
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108 / 154 page ![]() Electrical characteristics SPC58EEx, SPC58NEx 108/154 DS11646 Rev 4 Figure 32. DSPI PCS strobe (PCSS) timing (master mode) 3.18.2.1.3 DSPI LVDS master mode – modified timing PCSx PCSS tPCSC tPASC Table 57. DSPI LVDS master timing — full duplex — modified transfer format (MTFE = 1), CPHA = 0 or 1 # Symbol C Characteristic Condition Value(1) Unit Pad drive Load Min Max 1tSCK CC D SCK cycle time LVDS 15 pF to 25 pF differential(2) 30.0 — ns 2tCSC CC D PCS to SCK delay (LVDS SCK) PCS drive strength Very strong 25 pF (N(3) ×tSYS(4))– 10 —ns Strong 50 pF (N(3) ×tSYS(4))– 10 —ns Medium 50 pF (N(3) ×tSYS(4))– 32 —ns 3tASC CC D After SCK delay (LVDS SCK) Very strong PCS = 0 pF SCK = 25 pF (M(5) ×tSYS(4))– 8 —ns Strong PCS = 0 pF SCK = 25 pF (M(5) ×tSYS(4))– 8 —ns Medium PCS = 0 pF SCK = 25 pF (M(5) ×tSYS(4))– 8 —ns 4tSDC CC D SCK duty cycle(6) LVDS 15 pF to 25 pF differential 1/2tSCK –2 1/2tSCK +2 ns 7tSUI CC D SIN setup time SIN setup time to SCK CPHA = 0(7) SCK drive strength LVDS 15 pF to 25 pF differential 23 – (P(8) ×tSYS(4)) —ns SIN setup time to SCK CPHA = 1(7) SCK drive strength LVDS 15 pF to 25 pF differential 23 — ns |
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