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STM32WB35CC Fiches technique(PDF) 165 Page - STMicroelectronics |
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STM32WB35CC Fiches technique(HTML) 165 Page - STMicroelectronics |
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165 / 193 page ![]() DS11929 Rev 11 165/193 STM32WB55xx STM32WB35xx Electrical characteristics 169 Figure 34. Quad-SPI timing diagram - SDR mode Figure 35. Quad-SPI timing diagram - DDR mode SAI characteristics Unless otherwise specified, the parameters given in Table 96 for SAI are derived from tests performed under the ambient temperature, fPCLKx frequency and VDD supply voltage conditions summarized inTable 24: General operating conditions, with the following configuration: Output speed is set to OSPEEDRy[1:0] = 10 Capacitive load C = 30 pF Measurement are performed at CMOS levels: 0.5 ₓ VDD Refer to Section 6.3.17 for more details on the input/output alternate function characteristics (CK,SD,FS). MSv36878V1 Data output D0 D1 D2 Clock Data input D0 D1 D2 t(CK) tw(CKH) tw(CKL) tr(CK) tf(CK) ts(IN) th(IN) tv(OUT) th(OUT) MSv36879V3 Data output IO0 IO2 IO4 Clock Data input IO0 IO2 IO4 t(CLK) tw(CLKH) tw(CLKL) tr(CLK) tf(CLK) tsf(IN) thf(IN) tvf(OUT) thr(OUT) IO1 IO3 IO5 IO1 IO3 IO5 tvr(OUT) thf(OUT) tsr(IN) thr(IN) |
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