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STM32WB10CC Fiches technique(PDF) 28 Page - STMicroelectronics |
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STM32WB10CC Fiches technique(HTML) 28 Page - STMicroelectronics |
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28 / 110 page ![]() Table 6. STM32WB10CC modes overview Mode Regulator CPU1 Flash SRAM Clocks DMA and Peripherals Wakeup source Consumption(1) Wakeup time Run MR Yes ON(2) ON Any All N/A 91 µA/MHz N/A LPRun LPR Yes ON(2) ON Any except PLL All except RF and RNG N/A 90 µA/MHz 15.33 µs Sleep MR No ON(2) ON(3) Any All Any interrupt or event 28 µA/MHz 9 cycles LPSleep LPR No ON(2) ON(3) Any except PLL All except RF and RNG Any interrupt or event 27 µA/MHz 9 cycles Stop 0 MR No OFF ON LSE, LSI, HSE(4), HSI16(5) RF, BOR, PVD, RTC, IWDG, USART1(6), I2C1(7), LPTIMx (x=1, 2) All other peripherals are frozen. Reset pin, all I/Os, RF, BOR, PVD, RTC, IWDG, USART1, I2C1, LPTIMx (x=1, 2) 100 µA 1.7 µs Stop 1 LPR No OFF ON LSE, LSI, HSE(4), HSI16(5) RF, BOR, PVD, RTC, IWDG, USART1(6), I2C1(7), LPTIMx (x=1, 2) All other peripherals are frozen. Reset pin, all I/Os RF, BOR, PVD, RTC, IWDG, USART1, I2C1, LPTIMx (x=1, 2) 3.05 µA w/o RTC 3.45 µA w RTC 4.7 µs Standby LPR No OFF SRAMs ON LSE, LSI BOR, RTC, IWDG All other peripherals are powered off. I/O configuration can be floating, pull-up or pull-down Reset pin, two I/Os (WKUPx)(8) BOR, RTC, IWDG 0.345 µA w/o RTC 0.70 µA w RTC 51 µs OFF OFF 0.245 µA w/o RTC 0.600 µA w RTC Shutdown OFF No OFF OFF LSE RTC All other peripherals are powered off. I/O configuration can be floating, pull-up or pull-down(9) Two I/Os (WKUPx)(8), RTC 0.018 µA w/o RTC 0.425 µA w/ RTC - 1. Typical current at VDD = 2.4 V, 25 °C. for STOPx, SHUTDOWN and Standby, else VDD = 3.3 V, 25 °C. 2. The Flash memory controller can be placed in power-down mode if the RF subsystem is not in use and all the program is run from the SRAM. 3. The SRAM1 and SRAM2 clocks can be gated off independently. 4. HSE (32 MHz) automatically used when RF activity is needed by the RF subsystem. |
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