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REF50 Fiches technique(PDF) 28 Page - Texas Instruments |
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REF50 Fiches technique(HTML) 28 Page - Texas Instruments |
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28 / 31 page ![]() www.ti.com PACKAGE OUTLINE C 0.22 0.08 TYP 0.25 3.0 2.6 2X 0.95 1.45 MAX 0.15 0.00 TYP 6X 0.50 0.25 0.6 0.3 TYP 8 0 TYP 1.9 A 3.05 2.75 B 1.75 1.45 (1.1) SOT-23 - 1.45 mm max height DBV0006A SMALL OUTLINE TRANSISTOR 4214840/C 06/2021 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. Body dimensions do not include mold flash or protrusion. Mold flash and protrusion shall not exceed 0.25 per side. 4. Leads 1,2,3 may be wider than leads 4,5,6 for package orientation. 5. Refernce JEDEC MO-178. 0.2 C A B 1 3 4 5 2 INDEX AREA PIN 1 6 GAGE PLANE SEATING PLANE 0.1 C SCALE 4.000 |
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