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Moteur de recherche de fiches techniques de composants électroniques |
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Moteur de recherche de fiches techniques de composants électroniques |
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ADP5062ACPZ-1-R7 Fiches technique(PDF) 15 Page - Analog Devices |
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ADP5062ACPZ-1-R7 Fiches technique(HTML) 15 Page - Analog Devices |
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15 / 44 page  Data Sheet ADP5062 Rev. B | Page 15 of 44 THEORY OF OPERATION SUMMARY OF OPERATION MODES Table 7. Summary of the ADP5062 Operation Modes Mode Name VINx Condition Battery Condition Trickle Charge LDO FET State Battery Isolation FET System Voltage ISO_Sx Additional Conditions1 IC Off, Standby 0 V Any battery condition Off Off On/Off Battery voltage or 0 V Disable IC1 IC Off, Suspend 5 V Any battery condition Off Off On Battery voltage Disable IC1 LDO Mode Off, Isolation FET On 5 V Any battery condition Off Off On Battery voltage Disable LDO and enable isolation FET LDO Mode Off, Isolation FET Off (System Off) 5 V Any battery condition Off Off Off 0 V Enable battery charging LDO Mode, Charger Off 5 V Any battery condition Off LDO Off 5.0 V Enable battery charging Trickle Charge Mode 5 V Battery < VTRK_DEAD On LDO Off 5.0 V Enable battery charging Weak Charge Mode 5 V VTRK_DEAD ≤ battery < VWEAK On CHG CHG 3.8 V Enable battery charging Fast Charge Mode 5 V Battery ≥ VWEAK Off CHG CHG 3.8 V (minimum) Enable battery charging Charge Mode, No Battery 5 V Open Off LDO Off 5.0 V Enable battery charging Charge Mode, Battery (ISO_Bx) Shorted 5 V Shorted On LDO Off 5.0 V Enable battery charging 1 See Table 8 for details. Table 8. Operation Mode Controls Pin Configuration DIG_IOx Equivalent I2C Address, Data Bit(s) Description Enable Battery Charging DIG_IO3 0x07, D0 Low = all charging modes disabled (fast, weak, trickle). High = all charging modes enabled (fast, weak, trickle). Disable IC1 DIG_IO2 0x07, D6 Disable IC1 VINx1 Supply Connected LDO_FET ISO_FET Low No Off On Yes CHG CHG High No2 Off On Yes Off On Disable LDO and Enable Isolation FET 0x07, D3, D0 Low = LDO enabled. High = LDO disabled. In addition, when EN_CHG = low, the battery isolation FET is on; when EN_CHG = high, the battery isolation FET is off. 1 When disable IC1 mode is active, the VINx supply must always be connected and the supply voltage level must fulfill the following condition: VISO_Bx < VINx < 5.5 V. 2 When disable IC1 mode is active, the back gate of the LDO FET is not controlled. If the VINx pins are not connected to any voltage supply, the body diode of the LDO FET can become forward biased and the voltage at VINx is VISO_Bx – VF (VF is the forward voltage of the LDO FET body diode). |
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