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ADF4212LBRU Fiches technique(PDF) 13 Page - Analog Devices

No de pièce ADF4212LBRU
Description  Dual Low Power PLL Frequency Synthesizer
PDF  20 Pages
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Fabricant  AD [Analog Devices]
Site Internet  http://www.analog.com
Logo AD - Analog Devices

ADF4212LBRU Fiches technique(HTML) 13 Page - Analog Devices

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REV. 0
ADF4212L
–13–
IF N COUNTER LATCH
Table IV. IF N Counter Latch Map
12-BIT B COUNTER
CONTROL
BITS
DB0
DB1
DB2
DB3
DB4
DB5
DB6
DB7
DB8
DB9
DB10
DB11
DB12
DB13
DB14
DB15
DB16
DB17
DB18
DB19
DB20
C1 (1)
C2 (0)
A1
A2
A3
A4
A5
A6
B1
B2
B3
B4
B5
B6
B7
B8
B11
B12
P5
B10
IF
PRESCALER
DB23
P8
DB22
P7
DB21
P6
B9
6-BIT A COUNTER
0
0
.
.
.
1
1
1
1
0
0
.
.
.
1
1
1
1
0
0
.
.
.
1
1
1
1
..........
..........
..........
..........
..........
..........
..........
..........
..........
0
1
.
.
.
1
1
1
1
1
0
.
.
.
0
0
1
1
1
0
.
.
.
0
1
0
1
3
4
.
.
.
4092
4093
4094
4095
B12
B11
B10
B3
B2
B1
B COUNTER DIVIDE RATIO
0
0
0
0
0
.
.
.
1
1
1
1
0
0
0
0
0
.
.
.
1
1
1
1
..........
..........
..........
..........
..........
..........
..........
..........
..........
..........
..........
..........
0
0
1
0
0
.
.
.
0
0
1
1
0
1
0
1
0
.
.
.
0
1
0
1
0
1
2
3
4
.
.
.
60
61
62
63
A6
A5
..........
A2
A1
A COUNTER
DIVIDE RATIO
0
0
1
1
8/9
16/17
32/33
64/65
P6
PRESCALER VALUE
0
1
0
1
P5
0
1
DISABLED
ENABLED
P7
IF POWER-DOWN
0
1
DISABLED
ENABLED
P8
IF CP GAIN
N = BP+A, P IS PRESCALER VALUE SET IN THE FUNCTION LATCH
B MUST BE GREATER THAN OR EQUAL TO A
FOR CONTIGUOUS VALUES OF N, NMIN IS (P2 – P)



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