Moteur de recherche de fiches techniques de composants électroniques
  French  ▼
ALLDATASHEET.FR

X  

PCIMX6QP7AVT2AB Fiches technique(PDF) 86 Page - NXP Semiconductors

No de pièce PCIMX6QP7AVT2AB
Description  i.MX 6DualPlus/6QuadPlus Applications Processors Industrial Products
PDF  160 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Fabricant  NXP [NXP Semiconductors]
Site Internet  http://www.nxp.com
Logo NXP - NXP Semiconductors

PCIMX6QP7AVT2AB Fiches technique(HTML) 86 Page - NXP Semiconductors

Back Button PCIMX6QP7AVT2AB Datasheet HTML 82Page - NXP Semiconductors PCIMX6QP7AVT2AB Datasheet HTML 83Page - NXP Semiconductors PCIMX6QP7AVT2AB Datasheet HTML 84Page - NXP Semiconductors PCIMX6QP7AVT2AB Datasheet HTML 85Page - NXP Semiconductors PCIMX6QP7AVT2AB Datasheet HTML 86Page - NXP Semiconductors PCIMX6QP7AVT2AB Datasheet HTML 87Page - NXP Semiconductors PCIMX6QP7AVT2AB Datasheet HTML 88Page - NXP Semiconductors PCIMX6QP7AVT2AB Datasheet HTML 89Page - NXP Semiconductors PCIMX6QP7AVT2AB Datasheet HTML 90Page - NXP Semiconductors Next Button
Zoom Inzoom in Zoom Outzoom out
 86 / 160 page
background image
i.MX 6DualPlus/6QuadPlus Applications Processors Industrial Products, Rev. 3, 11/2018
86
NXP Semiconductors
Electrical Characteristics
Figure 46. RGMII Receive Signal Timing Diagram Original
Figure 47. RGMII Receive Signal Timing Diagram with Internal Delay
4.12.6
Flexible Controller Area Network (FlexCAN) AC Electrical
Specifications
The Flexible Controller Area Network (FlexCAN) module is a communication controller implementing
the CAN protocol according to the CAN 2.0B protocol specification.The processor has two CAN modules
available for systems design. Tx and Rx ports for both modules are multiplexed with other I/O pins. See
the IOMUXC chapter of the i.MX 6DualPlus/6QuadPlus reference manual (IMX6DQPRM) to see which
pins expose Tx and Rx pins; these ports are named FLEXCAN_TX and FLEXCAN_RX, respectively.
4.12.7
HDMI Module Timing Parameters
4.12.7.1
Latencies and Timing Information
Power-up time (time between TX_PWRON assertion and TX_READY assertion) for the HDMI 3D Tx
PHY while operating with the slowest input reference clock supported (13.5 MHz) is 3.35 ms.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


Fiches technique Télécharger

Go To PDF Page


Lien URL



ALLDATASHEET vous a-t-il été utile ?  [ DONATE ] 

À propos de Alldatasheet   |   Publicité   |   Contactez-nous   |   Politique de confidentialité   |   Lien vers la fiche technique    |   Echange de liens   |   Fabricants
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com