ICS8442I datasheet(9/15 Pages) ICST

9 / 15 page

8442AYI

www.icst.com/products/hiperclocks.html

REV. C MAY 10, 2005

Integrated

Circuit

Systems, Inc.

ICS8442I

700MHZ, CRYSTAL OSCILLATOR-TO-DIFFERENTIAL

LVDS FREQUENCY SYNTHESIZER

CRYSTAL INPUT INTERFACE

A crystal can be characterized for either series or parallel mode

operation. The ICS8442I has a built-in crystal oscillator circuit.

This interface can accept either a series or parallel crystal without

additional components and generate frequencies with accuracy

Figure 3. CRYSTAL INPUt INTERFACE

suitable for most applications. Additional accuracy can be

achieved by adding two small capacitors C1 and C2 as shown in

Figure 3. Typical results using parallel 18pF crystals are shown

in Table 10.

LVDS DRIVER TERMINATION

A general LVDS interface is shown in

Figure 4. In a 100

Ω differ-

ential transmission line environment, LVDS drivers require a

matched load termination of 100

Ω across near the receiver in-

put. For a multiple LVDS outputs buffer, if only partial outputs

are used, it is recommended to terminate the un-used outputs.

100

Ω Differential Transmission Line

FIGURE 4. TYPICAL LVDS DRIVER TERMINATION

DIFFERENTIAL DUTY CYCLE IMPROVEMENT

The schematic below is recommended for applications using the

÷1 output configuration for improving the differential duty cycle.

FIGURE 5. DIFFERENTIAL DUTY CYCLE IMPROVEMENT

3.3V

LVDS_DRIVER

100

HiPerClockS

Zo = 50 Ohm

nCLK

CLK

100

.1uf

Vcc = 3.3V

800

LVDS Driv er

1.3k

Zo = 50

1.3k

.1uf

Receiv er_dif

Zo = 50

800

18p

18pF Parallel Crystal

22p

XTAL_IN

XTAL_OUT

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