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ADN2855ACPZ-R7 Fiches technique(PDF) 6 Page - Analog Devices

No de pièce ADN2855ACPZ-R7
Description  Multirate 155 Mbps/622 Mbps/1244 Mbps/1250 Mbps Burst Mode Clock and Data Recovery IC with Deserializer
PDF  20 Pages
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Fabricant  AD [Analog Devices]
Site Internet  http://www.analog.com
Logo AD - Analog Devices

ADN2855ACPZ-R7 Fiches technique(HTML) 6 Page - Analog Devices

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ADN2855
Data Sheet
Rev. B | Page 6 of 20
RESET TIMING OPTIONS
OPTION 1
END OF
PACKET
OPTION 2
END OF
PACKET
OPTION 3
END OF
PACKET
RESET PULSE
0 BYTES TO 8 BYTES
0 BYTES TO 8 BYTES
RESET PULSE
(2 BYTES)
200µs BETWEEN BURSTS
200µs BETWEEN BURSTS
RESET PULSE
(2 BYTES)
GUARD TIME (4 BYTES)
THIS ASSUMES NO NOISE IS PRESENT
ON THE INPUTS TO THE ADN2855
THIS ASSUMES NO NOISE IS PRESENT AT THE INPUTS TO THE ADN2855 BETWEEN BURSTS.
IF THIS IS THE CASE, THE RESET PULSE MUST BEASSERTED UNTIL THE TIME THAT THE
INPUT DATA TO THE ADN2855 BECOMES VALID, IDEALLY JUST PRIOR TO THE START OF THE
PREAMBLE. THERE IS NO REQUIREMENT THAT FOLLOWING THE DEASSERTION OF THE
RESET SIGNAL THE ADN2855 MUST SEE AT LEAST 13 BITS OF THE PREAMBLE.
Figure 8. Reset Timing Options



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