DS20006554A datasheet(64/94 Pages) MICROCHIP

64 / 94 page

ZL30260-ZL30263

Data Sheet

DS20006554A

F1REM1

APLL Fractional Output Divider Remainder Register 1

14Ah

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Name

FREM[7:0]

Default

Bits 7 to 0: Fractional Output Divider Remainder (FREM[7:0]). The full 32-bit FREM[31:0] field spans F1REM1

through F1REM4 registers. FREM is an unsigned integer that specifies the remainder of the fractional output divider

value. See section 5.5.5.

F1REM2

APLL Fractional Output Divider Remainder Register 2

14Bh

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Name

FREM[15:8]

Default

Bits 7 to 0: Fractional Output Divider Remainder (FREM [15:8]). See the F1REM1 register description.

F1REM3

APLL Fractional Output Divider Remainder Register 3

14Ch

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Name

FREM[23:16]

Default

Bits 7 to 0: Fractional Output Divider Remainder (FREM [23:16]). See the F1REM1 register description.

F1REM4

APLL Fractional Output Divider Remainder Register 4

14Dh

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Name

FREM[31:24]

Default

Bits 7 to 0: Fractional Output Divider Remainder (FREM [31:24]). See the F1REM1 register description.

DS20006554A Fiches technique(PDF) 64 Page - Microchip Technology

DS20006554A Fiches technique(HTML) 64 Page - Microchip Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94

Fiches technique Télécharger

Lien URL