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PLL601-22XCL-R Fiches technique(PDF) 1 Page - PhaseLink Corporation

No de pièce PLL601-22XCL-R
Description  27MHz Multiple output XO with Audio Clock
PDF  4 Pages
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Fabricant  PLL [PhaseLink Corporation]
Site Internet  http://www.phaselink.com
Logo PLL - PhaseLink Corporation

PLL601-22XCL-R Fiches technique(HTML) 1 Page - PhaseLink Corporation

  PLL601-22XCL-R Datasheet HTML 1Page - PhaseLink Corporation PLL601-22XCL-R Datasheet HTML 2Page - PhaseLink Corporation PLL601-22XCL-R Datasheet HTML 3Page - PhaseLink Corporation PLL601-22XCL-R Datasheet HTML 4Page - PhaseLink Corporation  
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Preliminary
PLL601-22
27MHz Multiple output XO with Audio Clock
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 11/19/04 Page 1
FEATURES
• 2 XO outputs at 27MHz (27MHz crystal input).
• Selectable Audio Clocks supporting:
32kHz, 44.1kHz, 48kHz, 64kHz and 96kHz
sampling rates
256, 384 and 512 oversampling ratios
8.192, 11.2896, 12.288, 16.9344, 16.384,
18.432, 22.5792, 24.576MHz audio frequencies
• On-the-fly switching of the audio frequency
• Power down tri-state selector.
• 3.3V Operating Voltage.
• Available in 16-Pin SSOP
DESCRIPTION
The PLL601-22 is a low cost integrated XO IC with
power down feature, designed to work with a
fundamental 27MHz crystal to provide the most
common audio clocks (8.192, 11.2896, 12.288,
16.9344, 16.384, 18.432, 22.5792, and 24.576MHz)
required by sampling rates of 32kHz, 44.1kHz, 48kHz,
64kHz and 96kHz (256, 384 and 512 oversampling
ratios). The wide range of audio frequencies makes it
ideal for STB and MPEG Video applications.
PACKAGE PIN CONFIGURATION
Note: ^: Internal pull-up resistor. The internal pull-up resistor
results in a default high value when no pull-down resistor is
connected to this pin.
AUDIO CLOCK SELECTION
S2
S1
S0
ACLK (MHz)
0
0
0
8.192
0
0
1
11.2896
0
1
0
12.288
0
1
1
16.9344
1
0
0
18.432
1
0
1
16.384
1
1
0
22.5792
1
1
1
24.576
BLOCK DIAGRAM
1
2
3
4
5
6
7
8
XIN
9
10
11
12
13
14
15
16
XOUT
VDD
VDD
NC
GND
GND
PDOWN^
S1^
27MHz
VDD
S0^
27MHz
GND
ACLK
S2^
XIN = 27 MHz
Xout
PDOWN
27MHz
Xin
[S2-S0]
Audio
PLL
XO
ACLK
27MHz


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