PLL620-30

PECL and LVDS Low Phase Noise XO (32.5 to 130MHz output)

47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991

www.phaselink.com Rev 11/09/04 Page 2

ELECTRICAL SPECIFICATIONS

1. Absolute Maximum Ratings

PARAMETERS

SYMBOL

MIN.

MAX.

UNITS

Supply Voltage

4.6

V

Input Voltage, dc

-0.5

V

Output Voltage, dc

-0.5

V

Storage Temperature

-65

150

°C

Ambient Operating Temperature*

-40

85

°C

Junction Temperature

125

°C

Lead Temperature (soldering, 10s)

260

°C

ESD Protection, Human Body Model

2

kV

Exposure of the device under conditions beyond the limits specified by Maximum Ratings for extended periods may cause permanent damage to the

device and affect product reliability. These conditions represent a stress rating only, and functional operations of the device at these or any other

conditions above the operational limits noted in this specification is not implied.

*

Note: Operating Temperature is guaranteed by design for all parts (COMMERCIAL and INDUSTRIAL), but tested for COMMERCIAL grade only.

2. Crystal Specifications

3. General Electrical Specifications

PARAMETERS

SYMBOL

CONDITIONS

MIN.

TYP.

MAX.

UNITS

Supply Current (Loaded

Outputs)

PECL/LVDS

100/80

mA

Operating Voltage

2.97

3.63

V

Output Clock Duty Cycle

@ 1.25V (LVDS)

45

45

50

50

55

55

%

Short Circuit Current

±50

mA

4. Jitter Specifications

PARAMETERS

CONDITIONS

MIN.

TYP.

MAX.

UNITS

Period jitter RMS

77.76MHz

2.5

ps

Period jitter peak-to-peak

77.76MHz

18.5

ps

Integrated jitter RMS

Integrated 12 kHz to 20 MHz at 77.76MHz

0.5

ps

5. Phase Noise Specifications

PARAMETERS

FREQUENCY

@10Hz

@100Hz

@1kHz

@10kHz

@100kHz

UNITS

Phase Noise relative

to carrier

77.76MHz

-75

-95

-125

-145

-155

dBc/Hz

PARAMETERS

SYMBOL

CONDITIONS

MIN.

TYP.

MAX.

UNITS

CX+

2

Built-in Capacitance

CX-

2

Inter-electrode capacitance

65MHz to 130MHz

(VDD=3.3V)

2.6

pF

Oscillation Frequency

OF

Fund.

65

130

MHz